AArch64 compile-time matching, validation and emission. Used by the dynasm macro for arch aarch64 blocks. Mirrors dynasm-rs parser.rs (operand shapes), matching.rs (opdata selection with instruction format mismatch errors) and the static half of compiler.rs (literal range checks at expansion time; dynamic values are re-checked at runtime by aarch64.nim).
Procs
proc a64CondBitsOf(name: string): int {....raises: [], tags: [], forbids: [].}
proc a64IsBareV(name: string): bool {....raises: [], tags: [], forbids: [].}
- Bare vN without an arrangement suffix (invalid; needs .b8 etc).
proc a64IsReg(name: string; aliases: Table[string, string]): bool {. ...raises: [KeyError], tags: [], forbids: [].}
proc a64ProcessInstruction(mn: string; args: seq[NimNode]; ops: NimNode; aliases: Table[string, string]; condBits: int; stmt: NimNode): NimNode {. ...raises: [KeyError, ValueError], tags: [], forbids: [].}
- Classify args, select the op entry, statically validate literals, and build the runtime encoder call. Calls error() on any mismatch, like the x64 validators.
proc a64RegInfoOf(name: string; aliases: Table[string, string]): A64RegInfo {. ...raises: [KeyError], tags: [], forbids: [].}
proc isA64Mn(mn: string): bool {....raises: [], tags: [], forbids: [].}